The invention relates to testers and methods for testing digital circuits and isolating faults therein.
In testing digital logic boards, it is necessary to generate a test sequence that will exercise the logic circuitry on a board under test and compare, at each node of the logic circuitry of the board under test, the response of the board under test with the corresponding node response of a "known good" board. The known correct node responses are stored in a memory and fetched therefrom for comparison of the measured node responses of the board under test. The node responses of the board under test are usually first measured at the outputs of the board under test to determine whether the internal logic circuitry is functioning correctly. If one or more outputs of the board under test has a faulty response, it becomes necessary to isolate the source of such faults so that the defective components may be replaced or repaired.
One method for isolating defective components is to "probe" and measure response of various internal nodes of the board under test, beginning at an output (hereinafter, output "pin") at which a faulty response is initially detected and working "backward" from the output pin along a circuit path or paths indicated by the incorrect responses as internal nodes are successively probed and found "faulty". When a logic element is found that has correct, or "good", responses at all of its inputs and a faulty, or "bad", response at its output, that logic element is usually the faulty one.
While this technique accurately detects faults in the board under test, it requires a large amount of data storage, because it is necessary to store the complete response of each probed node, the complete response being the response of the node to a complex input test pattern of logic signals applied to the inputs of the board under test. For example, a printed circuit board with 100 integrated circuits might contain 500 nodes. The test program might contain 1,000 discrete input test "words", which could result in as many as 500,000 nodal states in the logic circuitry of the board under test, all of which must be stored in order to accomplish the above method of isolating defective components. The large amount of data storage required by the above fault isolation technique causes it to be practical only for large, very complex and very expensive computer based "factory-type" systems for testing digital logic boards.
Different techniques have been utilized for small, low cost systems mainly utilized for "field testing" (i.e. testing at the installation location) of digital logic boards. One such technique involves measurement of "signature" responses, (hereinafter referred to as "signatures") at each node of the board under test. Various well known algorithms and circuits are utilized to generate such signatures. Examples of signatures include those derived by counting the number of logic level transitions of the node under test, or computing cyclic redundancy check characters (hereinafter, "CRC character"). A "signature" therefore contains less information than is contained in the complete data stream during the testing, but it requires far less data storage, so that a much less expensive test system can be used.
Although the above-described signature techniques are widely utilized in equipment for testing digital logic boards, such techniques have a serious limitation. That limitation is that if the circuitry of the board under test contains a feedback loop (hereinafter simply a "loop"), and if there is a fault in the loop, the signature of all nodes within the loop will be incorrect because any error at any node in the loop ordinarily "propagates" rapidly around to all nodes in the loop. It is therefore not possible to isolate the fault to a particular node or component using the above-described technique of probing backwards from faulty output pins of the board under test.
The state of the art is generally indicated by U.S. Pat. No. 3,976,864, entitled "Apparatus and Method for Testing Digital Circuits", by Gordon et al., issued Oct. 24, 1976, and by U.S. Pat. No. 3,924,181, entitled "Test Circuitry Employing a Cyclic Code Generator", by Alderson et al., issued Dec. 2, 1975. The state of the art is also indicated by the following articles: "Signature Analysis: A New Digital Field Service Method", by Robert A. Frohwerk, pages 2-8, Hewlett-Packard Journal, May, 1977; "Easy-to-Use Signature Analyzer Accurately Troubleshoots Complex Logic Circuits", by Anthony Y. Chan, pages 9-14, Ibid., and "Signature Analysis-Concepts, Examples, and Guidelines", by Hans J. Nadig, pages 15-21, Ibid. Other U.S. Patents illustrative of the state of the art include: U.S. Pat. Nos. 3,492,572; 3,719,929; 3,723,868; 3,740,645; 2,756,409; 3,761,695; 3,784,907; 3,812,426; 3,815,025; 3,832,535; 3,924,181; 3,931,506; 3,967,103; 3,976,864; 3,976,940; 4,001,818; and 4,012,625.
Modern complex electronic gear is ordinarily fabricated utilizing printed circuit boards which include a large number of integrated circuits and other components mounted thereon. Manufacturers of such complex electronic equipment are obligated to service installed units. Such servicing involves testing the electronic equipment to isolate and repair or replace faulty components. Consequently, it is necessary to test printed circuit boards (hereinafter referred to simply as "boards" or "boards under test") at the site of the electronic equipment. Such testing is hereinafter referred to as "field service testing", in contrast to "factory testing", which is testing performed by the manufacturer on boards which must be returned to the factory for testing and repair because prior field testing equipment is incapable of both isolating faulty components at the site of the installed electronic equipment, so the field service testing personnel (who ordinarily are not extensively trained in the details of repairing the logic circuitry of all of the large number of different types of boards under test) can not make "on the spot" repairs.
Up to now, the testers utilized for field service testing of printed circuit boards have been capable of isolating the particular boards causing faults in the electronic equipment on a "go-no-go" basis. The most sophisticated of the known field service testers have been capable of performing signature testing of individual nodes on the board under test and permitting the operator to compare the signatures generated by the responses of various nodes of the board under test with corresponding "known good" signatures of "known good" boards previously measured and written on schematic diagrams. To use such field service testers, it is necessary for the operator to refer to detailed diagrams and instructions for the particular board under test to determine which nodes to measure and what the correct response is.
However, even the most sophisticated field testers do not permit isolation of the faults on the board under test for those nodes included in feedback loops in the logic circuitry of the board under test. Unfortunately, many, if not most, complex digital electronic boards have such loops. Frequently, the loops include many nodes, and frequently there are many such loops on a single board under test.
The above-described "factory testers" are capable of testing every node in the circuit and identifying faults by comparison to a known good response at each respective node. As mentioned above, such testers require that the complete data stream be stored at every node in the circuit, both for the known good board and the device under test, so the memory requirements for such factory testers capable of such comprehensive testing are enormous. The cost, complexity, and physical size of such factory testers makes it prohibitive to utilize the methods of such factory testers in field service testers.
Consequently, a large inventory of known good boards, called "spares" must be maintained by manufacturers of sophisticated digital electronic equipment. Spare boards must be transported to the site of installation of electronic equipment being tested. The present inadequate field service testers are then utilized merely to isolate faulty boards, which are replaced with corresponding spares, and the faulty boards are returned to the factory for comprehensive fault isolation analysis by factory testers and are then repaired by factory personnel, usually by merely unplugging and replacing a defective component identified by the factory tester.
The costs associated with factory testers, which cost in the range from approximately $50,000 to approximately $250,000, the high costs of maintaining an adequate inventory of spare boards, the costs associated with the delays involved in the process of sending faulty boards back to the factory for repair, the costs associated with the additional personnel required, and the additional transportation costs are, in total, excessively high. There is a great need for a low cost portable field tester capable of permitting ordinary service personnel to quickly "field test" individual boards in electronic products and isolate faults at the component level so that faulty components on the board may be quickly replaced.
It is further highly desirable that such field service testing be capable of being performed with a minimum amount of support documentation, so that service personnel do not need extensive training to familiarize themselves with details and documentation of each of the many boards produced by a manufacturer, and so that the other costs and inconveniences associated with such support documentation can be avoided.